I’d guess they’d need to figure out whatever apple did with it’s arm chips.
efficient use of many-cores and probably some fancy caching arrangement.
It’ll may also be a matter of financing to be able to afford (compete with intel, apple, amd, nvidia) to book the most advanced manufacturing for decent sized batches of more complex chips.
Once they have proven reliable core/chip designs , supporting more products and a growing market share, I imagine more financing doors will open.
I’d guess risc-v is mostly financed by industry consortia maybe involving some governments so it might not be about investor finance, but these funders will want to see progress towards their goals. If most of them want replacements for embedded low power arm chips, that’s what they’re going to prioritise over consumer / powerful standalone workstations.
At a minimum they’ve got to design a wider issue.
Current high-performance superscalar chips like the XuanTie 910 (what this laptop’s SoC are built around) are only triple-issue (3-wide superscalar), which gives a theoretical maximum of 3 ipc per core.
(And even by RISC standards, RISC-V has pretty “small” instructions, so 3 ipc isn’t much compared to 3 ipc even on ARM.
E.g., RISC-V does not have any comparison instructions, so comparisons need to be composed of at least a few more elementary instructions).
As you widen the issue, that complicates the pipelining (and detecting pipeline hazards).
There’s also some speculation that people are going to have to move to macro-op fusion, instead of implementing the ISA directly.
I don’t think anyone’s actually done that in production yet (the macro-op fusion paper everyone links to was just one research project at a university and I haven’t seen it done for real yet).
If that happens, that’s going to complicate the core design quite a lot.
None of these things are insurmountable.
They just take people and time.
I suspect manufacturing is probably a big obstacle, too, but I know quite a bit less about that side of things.
I mean a lot of companies are already fabbing RISC-V using modern transistor technologies.
That’s true for small and simple microcontrollers, but larger and more complicated ones can theoretically implement macro operation fusion in hardware to get similar benefits as CISC architectures
It definitely could scale up.
The question is who is willing to scale it up?
It takes a lot less manpower, a lot less investment, and a lot less time to design a low-power core, which is why those have come to market first.
Eventually someone’s going to make a beast of a RISC-V core, though.
Excl. Nation-states which have their own strategic reasons- NVidia, Google, Amazon, IBM, almost every single big cloud player are going to begin investing in RISC-V as it matures.
ARM charges a lot for its licensing and that’s only going up in the near future. x86 is simply too expensive to compete for unless you’re AMD or Intel.
At some point the Cloud CPU players are gonna jump on RISC for the cost savings, and the prospect of building their own platforms without licensing fees and lack of input on the direction of the ISA.
China is the main driver of growth in RISC-V currently. But we need to see how the trade wars will affect that. There was a recent news about RISC-V specifically in this regard.
We might also see more activity from Intel, Qualcomm and Nvidia.
milk-v is going to release a pretty powerful system, iirc i read it will be released in about 10 months, ventana also reportedly will release a server cpu in 2024.
It takes time, as it all is under heavy development. Just since very recently there are risc v sbc available that can run linux - before it was pretty much microcontrollers only. Be patient :)
Me too. Hell, I’d settle for a multi-core RV64GC processor offered as a bare chip and socket since I’ve always wanted to give building a motherboard a try but, the dev systems available seem to have everything soldered :(
Why is everything RISC-V some low power device, I want a workstation with PCIe 5.0 powered by RISC-V.
Cause it’s immature and low power devices are easier
What needs to be improved? The standards or manufacturing?
I’d guess they’d need to figure out whatever apple did with it’s arm chips.
efficient use of many-cores and probably some fancy caching arrangement.
It’ll may also be a matter of financing to be able to afford (compete with intel, apple, amd, nvidia) to book the most advanced manufacturing for decent sized batches of more complex chips.
Once they have proven reliable core/chip designs , supporting more products and a growing market share, I imagine more financing doors will open.
I’d guess risc-v is mostly financed by industry consortia maybe involving some governments so it might not be about investor finance, but these funders will want to see progress towards their goals. If most of them want replacements for embedded low power arm chips, that’s what they’re going to prioritise over consumer / powerful standalone workstations.
deleted by creator
At a minimum they’ve got to design a wider issue. Current high-performance superscalar chips like the XuanTie 910 (what this laptop’s SoC are built around) are only triple-issue (3-wide superscalar), which gives a theoretical maximum of 3 ipc per core. (And even by RISC standards, RISC-V has pretty “small” instructions, so 3 ipc isn’t much compared to 3 ipc even on ARM. E.g., RISC-V does not have any comparison instructions, so comparisons need to be composed of at least a few more elementary instructions). As you widen the issue, that complicates the pipelining (and detecting pipeline hazards).
There’s also some speculation that people are going to have to move to macro-op fusion, instead of implementing the ISA directly. I don’t think anyone’s actually done that in production yet (the macro-op fusion paper everyone links to was just one research project at a university and I haven’t seen it done for real yet). If that happens, that’s going to complicate the core design quite a lot.
None of these things are insurmountable. They just take people and time.
I suspect manufacturing is probably a big obstacle, too, but I know quite a bit less about that side of things. I mean a lot of companies are already fabbing RISC-V using modern transistor technologies.
That makes sense.
I think that’s the whole point of all risc - it saves power over cisc but may take longer to compute some tasks.
That’d be why things like phones with limited batteries often prefer risc.
That’s true for small and simple microcontrollers, but larger and more complicated ones can theoretically implement macro operation fusion in hardware to get similar benefits as CISC architectures
It definitely could scale up. The question is who is willing to scale it up? It takes a lot less manpower, a lot less investment, and a lot less time to design a low-power core, which is why those have come to market first. Eventually someone’s going to make a beast of a RISC-V core, though.
Who’s willing to scale it up? China probably
Excl. Nation-states which have their own strategic reasons- NVidia, Google, Amazon, IBM, almost every single big cloud player are going to begin investing in RISC-V as it matures.
ARM charges a lot for its licensing and that’s only going up in the near future. x86 is simply too expensive to compete for unless you’re AMD or Intel.
At some point the Cloud CPU players are gonna jump on RISC for the cost savings, and the prospect of building their own platforms without licensing fees and lack of input on the direction of the ISA.
China is the main driver of growth in RISC-V currently. But we need to see how the trade wars will affect that. There was a recent news about RISC-V specifically in this regard.
We might also see more activity from Intel, Qualcomm and Nvidia.
milk-v is going to release a pretty powerful system, iirc i read it will be released in about 10 months, ventana also reportedly will release a server cpu in 2024.
Given that sifive just effectively fired everyone, this might fall flat.
That’s yet another example of why you should not believe everything you read online, see this .
That’s the sort of thing I am interested in seeing, thanks! :)
It takes time, as it all is under heavy development. Just since very recently there are risc v sbc available that can run linux - before it was pretty much microcontrollers only. Be patient :)
That’s promising at least :)
Risc-v is still 50% slower than an unisoc SOC.
It’s probably what’s available without costing several kidneys.
RISC-V is advancing pretty quickly. I imagine we’ll see desktop class CPUs within a decade.
There is the 64 core, 32-128GB DDR4 Milk-V Pioneer, but it uses PCIe 4.0
Me too. Hell, I’d settle for a multi-core RV64GC processor offered as a bare chip and socket since I’ve always wanted to give building a motherboard a try but, the dev systems available seem to have everything soldered :(